• 专利附录
  • 专利说明
  • 权利要求
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    • 专利摘要:
    PURPOSE: A method for fabricating semiconductor device using an ArF exposure source is provided to remarkably improve yield of a semiconductor device by preventing a photoresist pattern from being transformed by an ArF photolithography process for forming a self-aligned contact(SAC) and by preventing a gate electrode from being damaged. CONSTITUTION: An insulation layer(24) and an anti-reflective coating(ARC) are sequentially formed on a substrate(20) including a plurality of adjacent conductive patterns. A photolithography process using the ArF exposure source is performed on the ARC to form a photoresist pattern defining a contact region. The ARC is etched to form the first open part exposing the surface of the insulation layer by using the photoresist pattern as an etch mask. A predetermined thickness of the exposed insulation layer is etched to form the second open part by using the photoresist pattern as an etch mask while C5F8/O2/Ar gas is used. The remaining insulation layer is etched to form the third open part(29) exposing the surface of the substrate between the conductive patterns by using the photoresist pattern as an etch mask while C5F8/CH2F2/O2/Ar gas is used.
    公开号:KR20030049908A
    申请号:KR1020010080242
    申请日:2001-12-17
    公开日:2003-06-25
    发明作者:이성권；황창연
    申请人:주식회사 하이닉스반도체；
    IPC主号:
    专利说明:

    A fabricating method of semiconductor device using ArF photolithography
    [8] TECHNICAL FIELD This invention relates to a semiconductor technology. Specifically, It is related with the pattern formation method using the argon fluoride (ArF) exposure source.
    [9] The microfabrication technology that has supported the progress of semiconductor devices is a photolithography technology, and it is no exaggeration to say that the improvement in resolution of this technology is directly connected to the future of high integration of semiconductor devices.
    [10] As is well known, the photolithography process includes a process of forming a photoresist pattern and a process of etching a layer to be etched through an etching process using the photoresist pattern as an etch mask to form a pattern having a desired shape such as a contact hole. Wherein the photoresist pattern includes a process of applying a photoresist on the etched layer, a process of exposing the photoresist using a prepared exposure mask, and a portion of the photoresist exposed or not exposed with a predetermined chemical solution; Through the development process.
    [11] On the other hand, the critical dimension of the pattern that can be implemented by the photolithography process (hereinafter referred to as CD) depends on which wave source of light is used in the above exposure process. This is because the CD of the actual pattern is determined according to the width of the photoresist pattern that can be realized through the exposure process.
    [12] The wavelength of the light source used in the initial stepper adopting the “step and repeat” exposure method is from 436 nm (g-line) to 365 nm (i-line) and is now 248 nm (KrF Excimer Laser) wavelength. It mainly uses stepper or scanner type exposure equipment using DUV (Deep Ultra-violet). The 248 nm DUV photolithography initially produced a number of problems, such as time delay effects and substrate dependence. However, in order to develop a product having a design of 0.15 μm or less, it is necessary to develop a technology with a new DUV photolithography technique having a wavelength of 193 nm (ArF Excimer Laser). However, even if a combination of various techniques for enhancing the resolution in the DUV photolithography technique is impossible to pattern less than 0.1㎛, the development of a photolithography technique having a new light source is actively progressing.
    [13] At present, an ArF (argon fluoride) laser (λ = 193 nm) is being developed to target a pattern up to 0.11 mu m. DUV photolithography is superior in terms of performance and resolution compared to i-rays, but process control is not easy. These problems can be divided into optical causes due to short wavelengths and chemical causes due to the use of chemically amplified photoresists. If the wavelength is shortened, the CD shake phenomenon due to the stationary wave effect and the reflection of reflected light due to the substrate phase become worse. CD shaking refers to a phenomenon in which the line thickness changes periodically as the degree of interference between incident light and reflected light changes depending on the slight thickness difference of the photoresist or the thickness difference of the substrate film. In the DUV process, a chemically amplified photoresist has to be used to improve sensitivity, and problems related to the reaction mechanism include PED (Post Exposure Delay) stability and substrate dependence. Development of a photoresist for ArF. ArF is a chemically amplified type such as KrF, but the material needs to be fundamentally improved. ArF photoresist material development is difficult because benzene rings cannot be used. Benzene rings have been used in i-ray and KrF photoresists to ensure dry etching resistance. However, when the benzene ring is introduced into the ArF photoresist, since the absorbance is large at 193 nm, which is the wavelength region of the ArF laser, the transparency is lowered and thus the exposure to the lower portion of the photoresist is impossible. For this reason, the research of the material which can ensure dry etching resistance, does not have a benzene ring, and has good adhesive force and can develop in 2.38% TMAH is progressing. To date, many companies and research institutes in the world have announced their research results, but the commercially available polymers of COMO (CycloOlefin-Maleic Anhydride) or Acrylate system, or a mixture of these photoresists are It has a benzene structure as shown.
    [14] Therefore, during the process of landing plug contact (LPC, etc.), a stripe-shaped pattern may occur, or PR may cluster or form plastic deformation during SAC etching. During the development and SAC etching, the resistance of PR is weakened, so that it is driven to one side. Therefore, it is urgent to compensate for the weak durability of ArF photoresist and the weak physical properties of fluorine-based gas.
    [15] 1 is a SEM photograph showing the pattern deformation in the SAC process using the above-described ArF photoresist. In order to obtain an etching profile in the SAC process, a fluorine-based etching gas is used. As described above, the pattern is deformed due to the fragility of the photoresist pattern, and FIG. 1 shows the pattern deformation. If the pattern is a more serious.
    [16] The present invention proposed to solve the problems of the prior art as described above, an object of the present invention to provide a semiconductor device manufacturing method using an argon fluoride exposure source that can minimize the deformation of the photoresist pattern for ArF.
    [1] 1 is a cross-sectional view showing the pattern deformation and contact defects in the SAC process using the ArF photoresist according to the prior art,
    [2] 2A to 2D are cross-sectional views illustrating a SAC etching process using a photoresist ArF exposure source according to an embodiment of the present invention;
    [3] 3A to 3F are SEM photographs showing cross sections and planes of the photoresist pattern according to the process application of the present invention, respectively.
    [4] * Explanation of symbols for the main parts of the drawings
    [5] 20 substrate 21 gate electrode
    [6] 22: hard mask 23: spacer
    [7] 24: insulating film 29: third open portion
    [17] In order to solve the above problems, the present invention includes the steps of sequentially forming an insulating film and an antireflection film on a substrate having a plurality of neighboring conductive patterns; Performing a photolithography process using an argon fluoride exposure source on the antireflection film to form a photoresist pattern defining a contact region; Etching the anti-reflection film using the photoresist pattern as an etching mask to form a first open part exposing the surface of the insulating film; Forming a second open part by etching a portion of the exposed insulating layer by using a C 5 F 8 / O 2 / Ar gas as an etch mask at least in the photoresist pattern; And a third open portion that exposes the substrate surface between the conductive patterns by etching the remaining insulating layer using at least the photoresist pattern as an etching mask using C 5 F 8 / CH 2 F 2 / O 2 / Ar gas. It provides a semiconductor device manufacturing method using an argon fluoride exposure source comprising the step of forming.
    [18] The present invention uses a C 5 F 8 gas at each stock step in pattern formation to compensate for the etch resistance of ArF photoresist, which is weaker than that of KrF photoresist. It is a technical feature that a fine pattern can be formed while minimizing pattern deformation during pattern formation using a photoresist for use.
    [19] DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can more easily implement the present invention.
    [20] 2A to 2D are cross-sectional views illustrating an SAC etching process using a photoresist ArF exposure source according to an embodiment of the present invention, which will be described in detail with reference to the drawings.
    [21] First, as illustrated in FIG. 2A, a plurality of conductive patterns in which silicides such as polysilicon and tungsten silicide are stacked on a substrate 20 on which various elements for forming a semiconductor device are formed, for example, a gate electrode 21 (hereinafter, referred to as a gate electrode) ).
    [22] That is, a gate insulating film (not shown) is formed at the contact interface between the substrate 20 and the gate electrode 21, and the loss of the gate electrode 21 is prevented on the gate electrode 21 by a subsequent SAC process or the like. The hard mask 22 using the nitride film etc. for this is formed.
    [23] Subsequently, spacer insulating films such as nitride films are formed along the entire profile where the gate electrode 21 is formed, and then the spacer 23 is formed on the sidewalls of the gate electrode 21 and the hard mask 22 through front etching.
    [24] Subsequently, an insulating film 24 such as, for example, an Advanced Planarization Layer (APL) oxide, Boro Phospho Silicate Glass (BPSG), Spin On Glass (SOG), or High Density Plasma (HDP) oxide film is formed over the entire structure.
    [25] Subsequently, after forming an organic anti-refrective coating 25 having a thickness of 100 kPa to 2000 kPa on the insulating film 24, an ArF photoresist is applied on the antireflective film 25, The photoresist pattern 26 is formed through a photolithography process using an ArF exposure source.
    [26] Specifically, an ArF photoresist such as COMA or acrylate is coated on the antireflection film 25 to a thickness of 1000 to 5000 GPa, and then an argon fluoride exposure source (not shown) and a predetermined reticle (not shown) are used. To selectively expose a predetermined portion of the photoresist, and to leave the exposed or unexposed portion through the exposure process through the developing process, and then remove the etch residues through the post-cleaning process to remove the photoresist pattern 26. To form.
    [27] Next, as shown in FIG. 2B, the first open portion 27 is formed to properly maintain the temperature of the substrate 20 and selectively etch the anti-reflection film 25 to expose the surface of the insulating film 24. Thereby defining a contact region for the SAC process.
    [28] At this time, using the conventional etching conditions, using a dry etching using a plasma with CF 4 / O 2 or N 2 / O 2 gas, CF 4 to 50SCCM to 200SCCM, O 2 1SCCM to 50SCCM flow rate In case of using CF 4 / O 2 , it is preferable to use a power of 300W to 1000W under a pressure of 20mTorr to 100mTorr, and when using N 2 / O 2 , N 2 is 100SCCM to 200SCCM and O 2 is 1SCCM. It is preferable to use a power of 300 W to 1000 W under a pressure of 1 mTorr to 100 mTorr using a flow rate of from 50 to 50 SCCM, respectively.
    [29] Therefore, the SAC pattern region is first defined through process conditions that minimize deformation of the photoresist pattern 26.
    [30] Next, as shown in FIG. 2C, a portion of the insulating layer 24 is etched using a plasma of a mixed gas of C 5 F 8 / O 2 / Ar to form a second open part 28.
    [31] At this time, C 5 F 8 using 10SCCM to 30SCCM, O 2 to 10SCCM to 30SCCM, Ar to 500SCCM to 1500SCCM, and a power of 100W to 1800W is used under a pressure of 20mTorr to 100mTorr.
    [32] Therefore, the above-described process recipe for producing a large amount of polymer forms a second open portion 28 having an inclination on the inner wall thereof, thereby suppressing deformation of the photoresist pattern 26.
    [33] Next, as shown in FIG. 2D, the temperature of the substrate 20 is appropriately maintained, and the photoresist pattern 26 is formed by using plasma by a mixed gas of C 5 F 8 / CH 2 F 2 / O 2 / Ar. The third open portion 29 exposing the surface of the substrate 20 is formed by etching the insulating film 24 using the back surface as an etch mask, wherein C 5 F 8 and O 2 and CH 2 F 2 are each 10SCCM. To 30 SCCM, Ar is used at a flow rate of 500 SCCM to 1500 SCCM to use a power of 800 W to 1400 W under a pressure of 20 mTorr to 100 mTorr.
    [34] Subsequently, after the photoresist pattern 26 and the antireflection film 25 are removed, the cleaning process is performed to remove the etching by-products, thereby minimizing pattern deformation, that is, the third open portion 29. In this case, the SAC process is taken as an example, and the third open part 29 is formed with a plug for connecting a subsequent storage node or a bit line.
    [35] 3A to 3F show cross-sectional and planar SEM photographs of the photoresist pattern according to the application of the present invention described above, where 'A' represents, for example, the center of the cell, and 'B' Edge is shown.
    [36] 3A shows the pattern cross section before the photoresist pattern removal (Ash), and FIGS. 3B to 3D show the pattern cross section after the photoresist pattern removal. 3E shows the plane, and FIG. 3F shows an enlarged view of FIG. 3E.
    [37] That is, the present invention described above has been found through the embodiment to minimize the pattern deformation during pattern formation using the ArF exposure source by applying the etching recipe for pattern formation as shown in Figure 3a to 3f.
    [38] On the other hand, the photoresist pattern of the present invention described above can be applied to a variety of forms, such as an isolated form of a line-type (Hole-type).
    [39] The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.
    [40] The present invention described above can prevent deformation of the PR pattern and damage of the gate electrode according to the ArF photolithography process for forming the SAC, and can secure a wide contact area, thereby ultimately improving the yield of the semiconductor device. Excellent effect can be expected.
    权利要求:
    Claims (11)
    [1" claim-type="Currently amended] Sequentially forming an insulating film and an anti-reflection film on a substrate having a plurality of neighboring conductive patterns formed thereon;
    Performing a photolithography process using an argon fluoride exposure source on the antireflection film to form a photoresist pattern defining a contact region;
    Etching the anti-reflection film using the photoresist pattern as an etching mask to form a first open part exposing the surface of the insulating film;
    Forming a second open part by etching a portion of the exposed insulating layer by using a C 5 F 8 / O 2 / Ar gas as an etch mask at least in the photoresist pattern; And
    A third open portion is formed using the C 5 F 8 / CH 2 F 2 / O 2 / Ar gas to etch the remaining insulating layer using at least the photoresist pattern as an etch mask to expose the substrate surface between the conductive patterns. Steps to
    A semiconductor device manufacturing method using an argon fluoride exposure source comprising a.
    [2" claim-type="Currently amended] The method of claim 1,
    Manufacturing a semiconductor device using an argon fluoride exposure source, characterized in that the C 5 F 8 to 10SCCM to 30SCCM, O 2 to 10SCCM to 30SCCM, Ar to 500SCCM to 1500SCCM at a flow rate of forming the second open portion Way.
    [3" claim-type="Currently amended] The method of claim 2,
    The method of manufacturing a semiconductor device using an argon fluoride exposure source, characterized in that for forming the second open portion using a power of 100W to 1800W under a pressure of 20mTorr to 100mTorr.
    [4" claim-type="Currently amended] The method of claim 1,
    Using the argon fluoride exposure source, characterized in that using the C 5 F 8 and the O 2 and the CH 2 F 2 in the forming the third open portion 10SCCM to 30SCCM, respectively Ar at a flow rate of 500SCCM to 1500SCCM Semiconductor device manufacturing method.
    [5" claim-type="Currently amended] The method of claim 4, wherein
    The method of manufacturing a semiconductor device using an argon fluoride exposure source, characterized in that for forming the third open portion using a power of 800W to 1400W under a pressure of 20mTorr to 100mTorr.
    [6" claim-type="Currently amended] The method of claim 1,
    The method of manufacturing a semiconductor device using an argon fluoride exposure source, characterized in that the gas of CF 4 / O 2 or N 2 / O 2 in the step of forming the first open portion.
    [7" claim-type="Currently amended] The method of claim 6,
    A method for manufacturing a semiconductor device using an argon fluoride exposure source, wherein the CF 4 is used at a flow rate of 50 SCCM to 200 SCCM and the O 2 is used at a flow rate of 1 SCCM to 50 SCCM.
    [8" claim-type="Currently amended] The method of claim 7, wherein
    The method of manufacturing a semiconductor device using an argon fluoride exposure source, characterized in that to use a power of 300W to 1000W under a pressure of 20mTorr to 100mTorr in the step of forming the first open portion.
    [9" claim-type="Currently amended] The method of claim 6,
    A method for manufacturing a semiconductor device using an argon fluoride exposure source, wherein the N 2 is used at a flow rate of 100 SCCM to 200 SCCM and the O 2 is used at a flow rate of 1 SCCM to 50 SCCM, respectively.
    [10" claim-type="Currently amended] The method of claim 9,
    The method of manufacturing a semiconductor device using an argon fluoride exposure source, characterized in that for forming the first open portion using a power of 300W to 1000W under a pressure of 1mTorr to 100mTorr.
    [11" claim-type="Currently amended] The method of claim 1,
    And forming a second open portion, wherein a bottom surface of the second open portion is substantially the same height as an upper portion of the conductive pattern.
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    同族专利:
    公开号 | 公开日
    KR100440776B1|2004-07-21|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    2001-12-17|Application filed by 주식회사 하이닉스반도체
    2001-12-17|Priority to KR10-2001-0080242A
    2002-12-17|Priority claimed from US10/320,718
    2003-06-25|Publication of KR20030049908A
    2004-07-21|Application granted
    2004-07-21|Publication of KR100440776B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR10-2001-0080242A|KR100440776B1|2001-12-17|2001-12-17|A fabricating method of semiconductor device using ArF photolithography|
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